1. Field of the Invention
The present invention relates generally to capacitors within integrated circuits. More particularly, the present invention relates to storage capacitors typically employed within memory cells within integrated circuits.
2. Description of the Related Art
Integrated circuits are formed from semiconductor substrates within and upon whose surfaces are formed transistors, resistors, capacitors, diodes and other electrical circuit elements. The electrical circuit elements are connected internally and externally to the semiconductor substrate upon which they are formed through patterned conductor layers which are separated by insulator layers.
As integrated circuit technology has advanced, the packing density of electrical circuit elements within integrated circuits has continued to increase. Simultaneous with the increase in packing density of electrical circuit elements within advanced integrated circuits has been the trend towards development of methods for efficiently forming high performance integrated circuit elements within those integrated circuits. With particular regard to memory integrated circuits, such as Dynamic Random Access Memory (DRAM) integrated circuits, there is a continuing trend and need directed towards providing methods and materials through which there may efficiently be formed within those memory integrated circuits high capacitance storage capacitors of limited surface dimension.
Towards the goal of efficiently forming within memory integrated circuits high capacitance storage capacitors of limited dimension, there has recently been disclosed by Kaga et al. in "A 0.29-.mu.m2 MIM-CROWN Cell and Process Technologies for 1-Gigabit DRAMs," IEDM 94, pp. 927-29, such a high capacitance storage capacitor. Disclosed is a high capacitance storage capacitor upon whose upper capacitor plate electrode is formed the first metallization layer within the Dynamic Random Access Memory (DRAM) integrated circuit within which is formed the high capacitance storage capacitor. The lower capacitor storage node of the disclosed capacitor is formed from a tungsten metal substituted polysilicon electrode. Due to the formation of the first metallization layer upon the upper capacitor plate electrode, an integrated circuit structure of sufficiently limited height is formed to allow for use of advanced lithographic techniques in forming the disclosed high capacitance storage capacitor.
Although not specifically directed to Dynamic Random Access Memory (DRAM) integrated circuits, recent disclosures within multi-chip module substrate technology parallel the trend shown in Dynamic Random Access Memory (DRAM) integrated circuit technology towards integrated and efficient manufacturing processes. For example, Kumar, in U.S. Pat. No. 5,120,572 discloses a method for fabricating electrical components, such as resistors and capacitors, integrally and efficiently within high density interconnect substrates for multi-chip modules, rather than as surface mount components upon those high density interconnect substrates. The disclosed method provides a more efficient method for manufacturing a multi-chip module substrate of enhanced performance.
Finally, there is disclosed by Singer, in "Options for Multilevel Metal," Semiconductor International, August 1992, pg. 20, general trends which are expected to influence methods and materials through which conductor and insulator films may be incorporated within advanced integrated circuits yet to be manufactured.
Desirable in the art are additional methods through which integrated circuit elements may be integrally and efficiently formed within integrated circuits. Particularly desirable are additional methods through which storage capacitors within integrated circuits, such as memory integrated circuits, may be integrally and efficiently formed therein.